Peregrine Semiconductor and Soitec Develop New Bonded Silicon-on-Sapphire Substrate for RFIC Manufacturing
News - Staff reports
Author: CompoundSemi News Staff
December 13, 2010... Peregrine Semiconductor Corporation of San Diego, California USA and Soitec announced the joint development and production ramp of a new, bonded silicon-on-sapphire (SOS) substrate.
Peregrine Semiconductor is a provider of radio-frequency (RF) ICs, and Soitec is a maker of silicon-on-insulator (SOI) wafers.
The SOS substrate has been qualified for use in manufacturing Peregrine’s next-generation STeP5 UltraCMOS™ RF IC semiconductors.
The new substrates use Soitec’s core direct wafer-bonding technologies combined with Peregrine’s legacy SOS process development and IC design expertise to develop the tuned substrate that the companies claim provides leading RF performance for mobile wireless and industrial markets.
Soitec’s process expertise and direct wafer-bonding technologies were utilized to transfer and bond a thin, high-quality, monocrystalline silicon layer onto a sapphire substrate. According to Peregrine, the resulting bonded silicon layer provides impressive improvements in transistor mobility and silicon quality beyond conventional SOS wafers with an epitaxially grown silicon layer.
Pregrine says that the new substrates enable IC size reduction and performance increase by as much as 30 percent. Peregrine also says it helps to continue its long-term strategy of attempting to develop highly integrated RF Front-End (RFFE) IC solutions with a substrate technology that matches the yield and scalability qualities of bulk silicon technologies.
“In just two years we were able to move from the feasibility phase to a mature product ready for industrialisation and production ramp,” commented Bernard Aspar, General Manager of Soitec's Tracit business unit.
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